< hvic > M81740FP high voltage half bridge driver publication date :april 2012 pin configuration (top view) description M81740FP is high voltage power mosfet and igbt gate driver for half bridge applications. features floating supply voltage ???????? 600v output current ???????? 3.25a (typ.) two input type ???????? in/sd internally set deadtime 3.3v and 5v input logic compartible. half bridge driver undervoltage lockout sop-8 package applications mosfet and igbt gate driver for lighting, refrigerator, air-conditioner, washing machine, inverter and general purpose. block diagram outline:8p2s (pb free) 1 1.in 2.sd 3.gnd 4.lo 8.v b 7.ho 6.v s 5.vcc lo gnd vcc ho vs vb r q r s in hv level shift 8 7 6 5 4 3 1 uv detect filter 2 sd uv detect filter delay dead ti me pulse gen vreg/vcc level shift vreg inter lock vreg/vcc level shift 5v
high voltage half bridge driver M81740FP publication date : april 2012 typical connection ( general purpose) i n sd l o vb ho vs vc c vcc up to 600v to load co m to controller 2
high voltage half bridge driver M81740FP publication date : april 2012 typical connection ( in unipolar modulation pwm application) load ho lo vs M81740FP in sd ho lo vs M81740FP in sd ic1 ic2 ua ub up to 600v sequence ( sd is used as low side input terminal) 3 ic1_in ic1_sd ic2_in ic2_sd ic1_ho ic1_lo ic2_ho ic2_lo ua - ub
high voltage half bridge driver M81740FP publication date : april 2012 v/ns 50 allowable offset voltage transient dv s /dt -50 ~ +150 storage temperature tstg -40 ~ +150 junction temperature tj c/w 50 junction-case thermal resistance rth(j-c) mw/ c 4.8 ta> 25 c ,on board linear derating factor k w 0.6 ta= 25 c ,on board package power dissipation pd v -0.3 ~ vcc+0.3 logic input voltage (in & sd) v in v -0.3 ~ vcc+0.3 low side output voltage v lo v -0.3 ~ 24 low side fixed supply voltage v cc absolute maximum ratings (ta=25 c unless otherwise specified) symbol parameter test conditions ratings unit v b high side floating supply absolute voltage -0.3 ~ 624 v v s high side floating supply offset voltage v b -24 ~ v b +0.3 v v bs high side floating supply voltage v bs =v b -v s -0.3 ~ 24 v v ho high side output voltage v s -0.3 ~ v b +0.3 v topr operation temperature -40 ~ +125 tl solder heatproof rohs correspondence 255:10s,max 260 * for proper operation, the device should be used within the recommended conditions v 5 ? 0 logic input voltage (in & sd) v in v v cc ? 0 low side output voltage v lo v 20 ? 10 low side fixed supply voltage v cc v v b ? v s high side output voltage v ho v 20 ? 10 v bs =v b -v s high side floating supply voltage v bs v 500 ? -5 v b >10v high side floating supply offset voltage v s v v s +20 ? v s +10 high side floating supply absolute voltage v b max. typ. min. unit limits test conditions parameter symbol recommended operating conditions thermal derating factor characteristic (maximum rating) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 25 50 75 100 125 150 temperature ta( o c) package power dissipation pd (w) 4
high voltage half bridge driver M81740FP publication date : april 2012 ns 60 ? ? cl = 1000pf between ho-v s high side turn-on rise time t rh ns 35 ? ? cl = 1000pf between ho-v s high side turn-off fall time t fh ns 60 ? ? cl = 1000pf between lo-gnd low side turn-on rise time t rl ns 35 ? ? cl = 1000pf between lo-gnd low side turn-off fall time t fl ns 90 0 ? |tdlh(ho)-tdlh(lo)| turn-on propagation delay matching S tdlh ns 40 0 ? |tdhl(ho)-tdhl(lo)| turn-off propagation delay matching S tdhl ns 270 ? ? shut down propagation delay sd ns 900 ? ? cl = 1000pf between ho-v s , lo-gnd v in = 0 5v turn-on propagation delay t dlh ns 400 ? ? cl = 1000pf between ho-v s , lo-gnd v in = 0 5v turn-off propagation delay t dhl ns 50 0 ? |tdead(lo-ho)-tdead(ho-lo)| dead time matching S dead v 2.7 2.2 ? high level input threshold voltage (v sd ) v ih (sd) v ? 1.6 0.8 low level input threshold voltage (v sd ) v il (sd) ns 520 400 280 cl = 1000pf between ho-v s , lo-gnd v in = 0 5v dead time lo turn-off to ho turn-on & ho turn-off to lo turn-on tdead * typ. is not specified. a ? 3.25 2.3 v o = 15v, pw < 10 ? s output low level short circuit pulsed current i ol a ? 3.25 2.3 v o = 0v, pw < 10 ? s output high level short circuit pulsed current i oh ? s ? 7.5 ? v cc supply uv filter time t vccuv v ? 0.5 0.3 v cc supply uv hysteresis voltage v ccuvh v 9.8 8.4 7.0 v cc supply uv reset voltage v ccuvr ? s ? 7.5 ? v bs supply uv filter time t vbsuv v ? 0.5 0.3 v bs supply uv hysteresis voltage v bsuvh v 9.8 8.4 7.0 v bs supply uv reset voltage v bsuvr ? a 5 ? ? v in = 0v ,v sd =5v low level input bias current i il ? a 60 25 ? v in = 5v ,v sd =0v high level input bias current i ih v ? 1.6 0.8 low level input threshold voltage (v in ) v il (in) v 2.7 2.2 ? high level input threshold voltage (v in ) v ih (in) v 0.2 ? ? i o = 20ma, lo, ho low level output voltage v ol v ? 14.4 13.8 i o = 0ma, lo, ho high level output voltage v oh ma 1.0 0.6 0.2 in = 0v or 5v v cc standby current i cc ma 0.5 0.2 ? in = 0v or 5v v bs standby current i bs ? a 1.0 ? ? v b = v s = 600v floating supply leakage current i fs max. typ.* min. unit limits test conditions parameter symbol electrical characteristics (ta=25 c,v cc =v bs (=v b -v s )=15v, unless otherwise specified) input/output timing diagram 50% 90% 10% 90% 10% tfl trh tdhl(lo) tdlh(ho) tdead (lo-ho) 50% 90% 10% 90% 10% trl tfh tdead (ho-lo) tdhl(ho) tdlh(lo) in ho lo 90% tsd sd ho lo 50% 5
high voltage half bridge driver M81740FP publication date : april 2012 function timing diagram 1 in sd ho lo function timing diagram 2 tvccuv uv trip uvreset uv trip uvreset tvbsuv uv trip uvreset uvreset tvccuv uv reset voltage uv trip voltage uv reset voltage uv trip voltage uv reset voltage uv trip voltage vcc vb in ho lo 6
high voltage half bridge driver M81740FP publication date : april 2012 1. ho has positive logic with reference to in. lo has negative logic with reference to in. 2. output signal (ho) is triggered by the edge of input signal. 3. logic during uv(v cc , v bs ) error lo is independent of v bs to respond to in. ho is locked at ?l? level as long as uv error for v bs is detected. after v bs uv reset level, the lock for ho is removed following an ?l? state of the in signal, and then ho responds to the input. uv error (v bs ) lo is locked at ?l? level as long as uv error for v cc is detected. after v cc exceeds v cc uv reset level, the lock for lo is removed and responds to in signal. ho is locked at ?l? level as long as uv error for v cc is detected. after v cc exceeds v cc uv reset level, the lock for ho is removed and responds to in signal. (v cc >v bs ) uv error (v cc ) lo ho error signal *if uv error for v cc is detected when ho is in ?h? level and the falling speed of v cc is exceeds 0.03v/ s, the off signal for ho might not be transmitted from low side to high side and then ho stays ?h?. 4. supply start up sequence please start up v cc supply and v bs supply in that order, and, please shut down v bs supply and v cc supply in that order. please start up v cc supply and v bs supply with gentle slope. if you start up supply with sharp slope, there is some possibility that ho or lo outputs ?h? for a moment. if v cc supply is less than 10v(outside of recommended operat ing conditions), there is some possibility that output does not change in response to input. please evaluate ca refully about supply start up or restart after shut down in your application systems. 7
high voltage half bridge driver M81740FP publication date : april 2012 package outline 8
high voltage half bridge driver M81740FP publication date : april 2012 9 main revision for this edition min. and max. limits of tdead was added. 5 ?storage temperature? was changed to ?-50 ~ +150 ?. 4 ?preliminary? was ? deleted. ?notice: ? this ? is ? not ? a ? final ? specification. some ? parametric ? limits ? are ? subject ? to ? change.? was ? deleted. - 2012.04.10 b new - 2012.01.26 a points pages revision date no.
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